Course: Embedded Systems Engineering (6607-631)

Persons:

• Prof. Dr.-Ing. Martin Radetzki (verantwortlich)

Type of Course:

lecture with exercise

In-Class Hours Per Week:

4

Contents:

1. Introduction to embedded systems and their design constraints
2. Synthesis models and algorithms
3. System level synthesis
4. High level synthesis
5. Pipelined data path and controller design
6. Software task scheduling and schedulability analysis
7. Static and dynamic methods for scheduling and priority assignment
8. Communication architectures for embedded systems

Literature:

Skript "Embedded Systems Engineering"

G. Buttazzo: Hard Real Time Computing Systems. 2nd edition, Springer, 2005

P. Eles, K. Kuchcinski, Z. Peng: System Synthesis with VHDL. Kluwer Academic Publishers, 1998

P. Marwedel: Embedded Systems Design. Springer, 2006

Location:

Stuttgart-Stadt

Module:

• 6607-630 Embedded Systems Engineering (elective)